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    3,477 ASIC FPGA VHDL trabalhos encontrados, preços em USD

    Implementar um jogo em verilog ou vhdl em vga

    $140 (Avg Bid)
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    6 ofertas

    Jogo VGA em Verilog para FPGA

    $154 (Avg Bid)
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    3 ofertas
    VHDL/verilog Encerrado left

    Segue trabalho em anexo

    $147 (Avg Bid)
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    10 ofertas
    Verilog e FPGA Encerrado left

    Implementar um JOGO mais simples possível com apenas os leds na linguagem verilog ou vhdl... Pode ser o jogo de decorar as cores dos leds que piscam, ou campo minado com leds, qualquer jogo simples (sem gráficos VGA.. projeto super simples na linguagem verilog).

    $26 (Avg Bid)
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    3 ofertas

    Olá Pedro, Você trabalho com FPGA (Zedboard) Xilinx? Preciso de um programa capaz de exibir a camera do Kinect em uma placa Zedboard.

    $100 (Avg Bid)
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    1 ofertas

    Preciso fazer um hardware com FPGA Altera ou Spartan da Xilinix programado em VHDL. Ele precisa receber e enviar pacotes UDP de um computador através da porta Ethernet. Eu já tenho o software que faz o envio dos pacotes UDP, hoje eu uso um hardware com FPGA Spartan III, pronto comprado da China. O hardware e o software que roda no computador são

    $2065 (Avg Bid)
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    2 ofertas

    ...para formar uma palavra de 32 bits. Os sinais de controle m1, m2, m3, wPC, wMem, wRI devem ser associados às chaves de entrada. Um arquivo comprimido com todos os módulos VHDL do MIPS multiciclo é disponibilizado no Moodle. O código MIPS a ser carregado na memória está contido no arquivo mem.mif. Para exibição dos dados nos ...

    $96 (Avg Bid)
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    3 ofertas

    Preciso de código em VHDL e respectivos ficheiros de testbench para um relógio digital. No LCD deve de aparecer: Linha 1: HH:MM:SS Linha 2: Relógio PNL Horas (HH) de 00 a 23 Com possibilidade de acerto Placa com frequência de relógio de 50Mhz Placa onde irá funcionar Xilinx/ Diligent Sparten-3E Preciso do có...

    $309 (Avg Bid)
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    1 ofertas

    I want to start a company for ASIC mining chips...need engineers and software developers.

    $1749 (Avg Bid)
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    5 ofertas
    AdWords ads 6 dias left

    We need an experienced specialist who can set up a mining equipment company, asic, miners. The site is English-language, texts of ads in English. With a successful setup, I will offer a profitable collaboration.

    $168 (Avg Bid)
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    19 ofertas
    abiramiamanm 6 dias left

    vlsi coding using QUARTUS II software FPGA

    $24 (Avg Bid)
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    1 ofertas

    We are looking for an implementation of a FPGA SATA-to-SATA bridge. Design should be made in VHDL and be compatible to Xilinx Aritx-7 Series. The FPGA should receive SATA as a device (SATA device controller) and forward these information after processing to one or two SATA devices as SATA host (SATA host Controller).

    $3252 (Avg Bid)
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    8 ofertas

    ...de la arquitectura del juego de instrucciones del RISC-V. El microcontrolador debe ser descrito en SystemVerilog de modo que sea sintetizable y pueda ser implementado en una FPGA Cyclone IV de Altera. Su validación experimental se realizará en el laboratorio mediante una aplicación sencilla propuesta por cada grupo que haga uso de los recursos hardware

    $199 (Avg Bid)
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    2 ofertas

    We are a Australian based...Digital Data to a DAC setup and amplified via Mosfets. Digital Data will be implemented on a Xilinx FPGA. Trapezoidal waveform needs to be written in VHDL so that circuit and Code simulation can be done in Tina software. An explanation of the VHDL code to be supplied so that code can be changed at any time in the future.

    $101 (Avg Bid)
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    2 ofertas

    For the ASIC Giant. 3D character ready to animate using Zbrush, Substance Painter and Maya. Texture maps done into Maya files.

    $114 (Avg Bid)
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    1 ofertas

    Develope script in XILINX ISE FPGA using nexys 4 ddr card Language VHDL For calculator

    $44 (Avg Bid)
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    4 ofertas

    ...de la arquitectura del juego de instrucciones del RISC-V. El microcontrolador debe ser descrito en SystemVerilog de modo que sea sintetizable y pueda ser implementado en una FPGA Cyclone IV de Altera. Su validación experimental se realizará en el laboratorio mediante una aplicación sencilla propuesta por cada grupo que haga uso de los recursos hardware

    $225 (Avg Bid)
    $225 Média
    4 ofertas

    Need to update VHDL and C-Code for change the communication from PCI-e to USB. The target is a Xilinx FPGA

    $627 (Avg Bid)
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    9 ofertas

    We are Hiring Good Programmer in FPGA, GPU, CUDA, MATLAB for our Company. (Removed by Freelancer.com Admin)

    $365 (Avg Bid)
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    9 ofertas

    The project is described in the uploaded file, however one can alter the project as long as keeping the equipments and the goal of the project intact

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    5 ofertas

    Hello i have a code of piano synthesizer using VHDL (vivado) and i want to understand it and fix it ... can you help me ?

    $12 / hr (Avg Bid)
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    1 ofertas

    ...ability to extract and critically evaluate data for an unfamiliar digital design problem.‎ • The application of appropriate design methods to the VHDL design.‎ • The selection appropriate analysis tools, VHDL model abstraction levels and simulation test vectors.‎ • Ability to implement your design solution on a commercially available digital Computer

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    7 ofertas

    ...be 3 different block RAMs, or 2 block RAMs and “LUTRAM” created by using a logic block as RAM). Your CAD tool should attempt to find a solution that minimizes the area of the FPGA needed to fit each benchmark circuit....

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    1 ofertas

    ...be 3 different block RAMs, or 2 block RAMs and “LUTRAM” created by using a logic block as RAM). Your CAD tool should attempt to find a solution that minimizes the area of the FPGA needed to fit each benchmark circuit....

    $405 (Avg Bid)
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    3 ofertas

    ...player's movement should not be pixel by pixel but rather, it should keep sliding until it hits the wall(boundary). The movement control should be done through the keys on the FPGA. The maze should have a fully functional non-flickering background, which should be easily be replaced. It should also have a start and game over screen. The work should have

    $174 (Avg Bid)
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    4 ofertas

    I need someone to write verilog code and also test .do files for a simplified board game. The program should output to vga. the game is quite simple ;2 players ro...imported from a library etc. The work should have lots of comments ,documentation and test (.do) files so that it can be easily understood by a beginner. it should work with a FPGA board.

    $155 (Avg Bid)
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    2 ofertas

    I need an FPGA selected and hardware design created for decoding of an MPEG-Transport Stream parallel interface from a DVB-T demodulator. The FPGA needs to decode the transport stream and extract the video data as well as any other data contained in the Transport stream, the FPGA must then extract a selected individual pixel, and its colours are extracted

    $916 (Avg Bid)
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    11 ofertas

    ...you can modify that but I need the code running on FPGA board after I download it to it. Description: You have to create the VHDL model for the 4-bit multiplier. You must also synthesize the VHDL model, download to FPGA and test your multiplier on the FPGA board. Use a push button on the DE10-Lite FPGA to provide the clk input to the multiplier. The

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    12 ofertas

    You have to build an address block using VHDL

    $48 (Avg Bid)
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    5 ofertas
    Custom FPGA Project Encerrado left

    This is a multi-part project for the Lattice MACHXO2-4000 LOGIC IC.

    $21 / hr (Avg Bid)
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    4 ofertas

    Looking for a developer to interface high speed TI DAC with virtex 7 FPGA. I am having DAC34H84 DAC and VC707 kit- and want to interface the same DAC with VC707 Hardware that i have is DAC34H84 and VC707

    $42 / hr (Avg Bid)
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    10 ofertas
    Hardware Design Encerrado left

    - schematic capturing; - PCB lay-outing; - production files generation, prototype bringing-up and troubleshoo...experience: mixed circuitry hardware design, digital interfaces: USB, ADC (120MHz), analog circuitry: impedance matching, ADC, frequencies up to 100MHz, clocking and sync schemes, FPGA/MCU and peripherals. Job Type: Contract Location: GTA

    $27 / hr (Avg Bid)
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    16 ofertas

    hello, I have this project where I need to read from files and print the output in one file. I provided a very similar code , that can be modify and Matlab code to generate input files.

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    4 ofertas

    ...[login to view URL] Сайт создан на конструкторе satu.kz. Title Asic Mining в Казахстане – Купить asic для майнинга. Keywords asic, asic miner, купить асик, купить асик в казахстане, asic цена, asic miner купить, купить асик в астане, асик, майнинг, miner, mining, asic майнинг купить, asic майнинг купить, астана майниг, майнинг...

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    20 ofertas

    To stimulate a project-based evaluation approach using VHDL and write a report. More information is contained in the file. Projects need to be written in VHDL and run a simulation for the program using a board. I will need the VHDL code and simulation for the timing diagram.

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    3 ofertas
    AXI FULL FIFO debug Encerrado left

    I created this project and fini...created this project and finished the entire code ,but for some reason it is not giving me the correct outputs.I would like help to fix the issue by editing my code. using VHDL in vivado I was able to create successful circular cordic. but when I made my AXI full and run it in SDK, it did not give me the right answer

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    A task compromising of Counter, clock divider, clock enable (CE), and seven-segment display using VHDL and Xinlinx Vivado. Further details will be provided. Deadline 3 days.

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    A simple boundary extraction project that involves eroding a binary image using morphological structuring element, and subtracting the outcome from the binary image to get boundaries.

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    We are a Signal processing Company, we are looking for designing a Board which can take 2 Channels of 70 MHz Input, 2 Channels of Baseband Signal 10 MHz BW, ... 2 Channels of Baseband Signal 10 MHz BW, 2 Digital TTL Channels with 10 MHz Rate and Ethernet Port for data transfer. All the Inputs and Outputs have to be connected to an FPGA processor Zync.

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    We are looking for one freelancer to develop FPGA software for best mining algo using Xilinx FPGA VCU1525 card. You will have to program an FPGA card that I will provide, to work for crypto mining. Is necessary also customize mining software that works under Windows to by able to works with the FPGA. Software must have to be perfectly optimized.

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    ...found in attached files * * Program used : Quartus Prime * * Block Diagram template also found in attached files * * Hardware used: DE10-Lite kit with MAX10 10M50DAF484C7G FPGA * ____________ Final Products: ____________ -A software-level block diagram showing the connections between the System Verilog modules described in pdf -System Verilog implementations

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    We are looking to take the attached sketches and make them into a clear power point presentation. The deck needs to be simple and clean...1: Cover with our logo Slide 2: Timelines/milestones slide 3: Our "All On" Approach Slide 4: Seoul Semiconductors Approach Slide 5: Two Variants Slide 6: NEXT GEN DESIGN WITH ASIC CHIP Slide 7: Final Concept Graphic

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    43 ofertas

    1) Design a Finite State Machine (FSM) using Verilog to control the taillights of a 1965 Ford Thunderbird. 2) Implement your design on FPGA

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    3 ofertas

    Hi ! I currently need pcb layout engineer to upgrade my personal fpga board. It previously used Spartan 3E FPGA PQFP (PQ208/PQG208) package using the power voltage of 3.3v, 2.5v, 1.2v ... I'd like to have it replaced by an Artix fpga (FG484/FGG484 Fine-Pitch BGA package), henceforth using the lower voltages of 3.3v, 1.8v, 1.0v The voltage regulators

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    30 ofertas

    I would like to port Nueral network for image identification on PYNQ FPGA

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    14 ofertas

    ...ability to extract and critically evaluate data for an unfamiliar digital design problem.  The application of appropriate design methods to the VHDL design.  The selection appropriate analysis tools, VHDL model abstraction levels and simulation test vectors.  Ability to implement your design solution on a commercially available digital Computer Aided

    $74 (Avg Bid)
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    5 ofertas

    am a master student, studying embbeded microelectronic and wireless systems, i need a vhdl code for dual_4_1 multiplexer, for structure, behaviour and dataflow if possiblr. thank you

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    15 ofertas

    more details will be given in the chat and it more of writing article on this, if you cant write article on this please dont place your bid

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    4 ofertas

    The goal is to design a game on Xilinx FPGA. More details on chat. The deadline will be 3 days. Only serious bidders who can complete in 3 days should bid. No Excuses. Time wasters avoid bidding, please.

    $120 (Avg Bid)
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    Cryptocurrency Mining Application in C or C++ We are seeking a senior engineer/architect with experience working with cryptocurrency mining sys...engineer/architect with experience working with cryptocurrency mining systems to provide technical consultation and to implement (or guide implementation) of a mining application for an FPGA via MicroBlaze.

    $201 (Avg Bid)
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    4 ofertas