Completed

Verilog Project (Cordic/FIR Filter/AES Encryptor)

Pick one of the following:

- Cordic (COordinate Rotation DIgital Computer)

- FIR Filter

- AES Data Encryptor

There will be 3 Milestones, I will award a maximum of $30/Milestone, So a total of $90 for this project.

Milestone 1: (4 Days) DESIGN REPORT

Develop a Design Report for the project. This document will be the reference all along the course of the project development cycles. It is the specification document. It should be used during design and also during verification. It is a living document so a table in the first page should be made to describe the changes of each revision and the date of the change.

The Design Report should contain:-

1. Introduction to your system and cite references

2. Top-down hierarchical design

3. Target the Xilinx Spartan-3 of the FPGA board. Identify other parts of the board you will need such as SRAM. The board comes with template with interfacing with different components on the board.

4. describe the functinality of each module

5. Describe the Input/Output ports of each module including the top level

6. Assign a clock domain for each module and the rational. How many DCM will be used.

7. Describe an initial state diagram for the FSMs

8. Include initial timing diagram for each module (if necessary)

9. Include an initial test plan for verification.

-- Submit the report as a Word document.

Milestone 2: RTL Implementation and Functional Simulation

Milestone 3: Timing closure

Milestone 4: Hardware Validation

Habilidades: Engenharia Elétrica, Eletrônica, Engenharia de Telecomunicações, Verilog / VHDL

Veja mais: top level diagram, template specification document, system specification document template, specification document template word, it specification document template, i spartan, fir filter design, electronics engineering course, digital domain, verilog rtl, it project plan template, xilinx, xilinx system, system verilog, spartan, hardware board design, Electrical System , electrical diagram, design and simulation project, aes

Acerca do Empregador:
( 24 comentários ) CAIRO, Egypt

ID do Projeto: #6633122

Concedido a:

ahmedmohamed85

Hi, I have more than 7 years experience in digital design using vhdl and verilog please check my profile, I can do all of these topics, also I have my own fpga lab, if you are in Egypt, I can meet you and explain to yo Mais

$90 USD em 3 dias
(102 Comentários)
6.8

6 freelancers estão ofertando em média $83 para esse trabalho

botondkirei

Hello! I have an AES encryption hardware care allready implemented and documented. I will sel it to you for 90$. If you contact me I can send you the existing documentation. If you select me as project provider I wi Mais

$90 USD em 1 dia
(7 Comentários)
4.2
zarnescugeorge

I can help you with this too! I can offer the same quatily and corectness! At a low price! Have a nice day!

$83 USD em 1 dia
(12 Comentários)
4.0
dpetar

Hi, I am an experienced electronic engineer. I know cordic and FIR (but FIR better), so in my case let it be FIR. I have couple of Spartan 3 evaluation boards so I can easily make real life proof. I suppose this Mais

$82 USD in 3 dias
(1 Comentário)
2.0
RAJCDAC

Ready to take on the task, we have done good research on ARS encryptor, pls visit [login to view URL] to know more about us. Regards

$90 USD in 3 dias
(0 Comentários)
0.0
MURA556

A proposal has not yet been provided

$61 USD in 3 dias
(0 Comentários)
0.0