Pick one of the following:
- Cordic (COordinate Rotation DIgital Computer)
- FIR Filter
- AES Data Encryptor
There will be 3 Milestones, I will award a maximum of $30/Milestone, So a total of $90 for this project.
Milestone 1: (4 Days) DESIGN REPORT
Develop a Design Report for the project. This document will be the reference all along the course of the project development cycles. It is the specification document. It should be used during design and also during verification. It is a living document so a table in the first page should be made to describe the changes of each revision and the date of the change.
The Design Report should contain:-
1. Introduction to your system and cite references
2. Top-down hierarchical design
3. Target the Xilinx Spartan-3 of the FPGA board. Identify other parts of the board you will need such as SRAM. The board comes with template with interfacing with different components on the board.
4. describe the functinality of each module
5. Describe the Input/Output ports of each module including the top level
6. Assign a clock domain for each module and the rational. How many DCM will be used.
7. Describe an initial state diagram for the FSMs
8. Include initial timing diagram for each module (if necessary)
9. Include an initial test plan for verification.
-- Submit the report as a Word document.
Milestone 2: RTL Implementation and Functional Simulation
Milestone 3: Timing closure
Milestone 4: Hardware Validation