Encerrado

Design a simple CPU using Verilog

This is a school assignment that requires us to design a simple 5-stage pipeline CPU. It should be able to detect data hazard and insert bubbles into the pipeline accordingly.

This is the description of the assignment:

[url removed, login to view]

Habilidades: Eletrônica, Verilog / VHDL

Ver mais: verilog cpu design, design using cpu, cpu design verilog, simple cpu design, design cpu using verilog, simple cpu verilog design, simple cpu verilog, cpu verilog design, vhdl and verilog, verilog vhdl, d design a, simple design assignment, verilog pipeline design, vhdl assignment, simple assignment school, verilog hazard, pipeline hazard verilog, simple stage design, simple verilog pipeline, simple file sharing, design cpu vhdl, verilog pipeline, pipeline verilog, cpu verilog, verilog design

Acerca do Empregador:
( 0 comentários ) Johor Bahru, Singapore

ID do Projeto: #5115568

12 freelancers estão ofertando em média $278 para este trabalho

ahmedmohamed85

Dear sir, I have more than 5 years experience in digital design using verilog I have already worked in similar project before please read the reviews written on me for similar CPU design project

$244 SGD in 7 dias
(46 Comentários)
6.2
farazahmad759

Dear Hiring Manager, I have already built similar processor (CPU) during my BS engineering. I can help you do this. You can have a look at my profile to see how beautifully I have done all my projects, and read revie Mais

$1000 SGD in 50 dias
(13 Comentários)
4.8
zeshannaseer

Dear Client I can do this.I have already done similar project for some other purpose so I can provide you complete code within two days with all specifications you [url removed, login to view] profile is temporarily LOCK but you can see my Mais

$200 SGD in 4 dias
(18 Comentários)
4.7
amibio

Hi, Verilog HDL expert here with 15+ years experience (since early 1998). 36 yo, really old in this field and experienced ^_^ Have designed more than 20 CPUs and overall 125+ custom designs including FFT, DCT, motion e Mais

$244 SGD in 7 dias
(1 Comentário)
4.0
eicr2013

Hi I am an electronic undergraduate. I am very good at verilog. I recently developed 8051 microcontroller using verilog. I can help you.

$277 SGD in 8 dias
(5 Comentários)
3.2
Quadrupole

I have an experience in FPGA programming using Verilog and VHDL. I can implement this project. I can use Xilinx ISE or ModelSim for simulation

$200 SGD in 5 dias
(2 Comentários)
2.9
vivekgajera

I can do your project.i have two year plus experience of this field....................................................

$230 SGD in 3 dias
(1 Comentário)
1.5
stranger0090

Greetings, A certified Engineer is here to deliver. I can start right now. If you need full marks in the assignment; hire me. Thanks

$150 SGD in 5 dias
(0 Comentários)
0.0
GabrielSoare

Hello there. I can handle your project at a good price and a decent time. I'm the owner of this site : [url removed, login to view] and I am a electronic engineer. I have strong knowledges with embedded systems. You can see my fre Mais

$200 SGD in 14 dias
(0 Comentários)
0.0
saqawyasir

Hi , I can deliver the project to you on well in time. Have already done this and have got the files almost ready. Just need to check them again for you. I have quite well experience in computer architecture with in Mais

$135 SGD in 3 dias
(0 Comentários)
0.0
albinrazuvaev

Hello. I've designed several simple CPU's. The description says there are two phases - PhaseOne and PhaseTwo(with shared memory for instructions and data). What phase do you need? I think your final grade primari Mais

$300 SGD in 5 dias
(0 Comentários)
0.0
pmullappilly

Hi, I am a graduate in EEE.I have 15 years of experience in programming,electronic design and teaching.I can do this work for you. Thanks and Regards, Prasad.M

$155 SGD in 10 dias
(0 Comentários)
0.0
mkarimim

I made a CPU last year for my assignment, I can do it for you again. Verilog is my favorite hardware design language.

$155 SGD in 3 dias
(0 Comentários)
0.0