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Receiver bank implementation with SDR

We would like to use wide band SDR such as bladeRF or other, in order to implement 20 receivers in the [url removed, login to view] band.

Receivers should be 1 or 2 mbps, gfsk, with predefined properties.

Simple version should detect RSSI over noise (and maybe preamble) and send I/Q samples together with time stamp.

A better version will run bit synchroniser on each channel and only send bits if rssi above threshold.

budget and time line to be agreed.

Habilidades: Comunicações, Software Integrado, FPGA

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( 4 comentários ) Ness Ziona, Israel

ID do Projeto: #10502996

4 freelancers estão ofertando em média $4825 para este trabalho

endlessflier

Thanks for posting this proposal. In first, I would like to regard my profile and skill. I am a Embedded system expert for circuit/pcb design and firmware development over 8 years. My skills are quite suitable Mais

$3000 USD in 30 dias
(5 Comentários)
4.4
sooraj13

Hello Sir, We are a Indian development company here. we have checked your posted details here and want more clarification in it, so message us to discuss on it more then we will able to move on it. Thanks

$1512 USD in 30 dias
(1 Comentário)
3.8
bandrey

Hello, We had experience for design SDR based on Xilinx FPGA ( several TX and RX RF channels) for marine application.

$11300 USD in 180 dias
(2 Comentários)
3.1
Incredible7093

i will do this project for you. i have a grip on fpga(verilog) worked on spartan series. just send me the further details of project

$2500 USD in 30 dias
(0 Comentários)
0.0
$1604 USD in 30 dias
(0 Comentários)
0.0
$2500 USD in 30 dias
(0 Comentários)
0.0