Design an efficient implementation processor using an ECC technique on FPGA platform.
The design includes the algorithm and writing the description in details From (A-Z).
The design have to be written in (VHDl /Verilog) and have to be synthesized and tested by (ISE design suite 14.2)
8 freelancers estão ofertando em média $593 para este trabalho
I will read atleast two implementation and think about the architecture and if it possible propose new architecture. finnally i implement one of them and optimise hardware to get higher clock.