I need to implemente a Xilinx partial reconfiguration model for an SDR on the AD9361-Z7035 with ADRV1CRR-BOB.
Expert who has strong experience in Partial reconfiguration implementation on the zynq board is really needed.
- Data send from Linux external system to board using an Etherent UDP communication.
- Option to switch between NRZ-L (no encoding/decoding) and NRZ-M line Coding/Decoding
- Interface to QPSK Modulator/Demodulator
- Data received via Linux external system to board using the same Ethernet UDP communication.
- We will provide all IP’s (Encoders and Modulator)
- Vendor will provide code for both the Linux test machine and AD9361-Z7035
- Bug free code should be provided for testing and acceptance
Please read the job description carefully and stat your bid with "PR".
Looking forward to good proposal.