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One Operand Assembler In MIPS

The goal of this assignment is to write an assembler for the one operand, two address mode assembly language described below. You do NOT need to check for syntax errors, but you do need to generate the machine code.

The language has 8 instructions: Load, Store, Add, Sub, Bra, Bgtr, Bzr, End. Every instruction has at most one operand which must be a PC-relative address, or an immediate value. Immediate values are base 10 integer numbers preceeded by a #, and PC-relative addresses are written as labels. Every instruction is encoded in 16 bits. The first 3 bits of the instruction are for the opcode, the next bit indicates which of the 2 address modes to use (0 for PC-relative and 1 for immediate), and the last 12 bits hold either a two's complement offset for the PC-relative address (i.e. the difference in bytes between that line and the label), or a two's complement immediate value. Labels must be 3 letters followed by a colon. If a label has no instruction following it, then it is assumed to be an empty 16 bits of memory. You may assume that every machine program will be loaded starting at memory location zero. Note that End is encoded by 111000000000000.

You should read in the assembly program line by line until it sees End. Then you should print out the machine language version.

## Deliverables

1) Complete and fully-functional working program(s) in executable form as well as complete source code of all work done.

2) Installation package that will install the software (in ready-to-run condition) on the platform(s) specified in this bid request.

3) Exclusive and complete copyrights to all work purchased. (No GPL, 3rd party components, etc. unless all copyright ramifications are explained AND AGREED TO by the buyer on the site).

## Platform

PCSPim, Windows, MIPS

Habilidades: Montagem, Engenharia, MySQL, PHP, Arquitetura de software, Teste de Software

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