Custom Signal-Processing CPU on FPGA

@olegwork673

Hi,sir I am expert in FPGA field. To expedite project progress, we're looking for an expert to design and verify a Verilog/VHDL-based, signal processing-focused custom CPU core. I'll provide you with the instruction set and processing requirements, and you'll handle everything from RTL development and simulation to Vivado synthesis, timing compliance, and board demonstration. We require RTL source code, test benches, a synthesis project, resource/timing reports, and an actual board demo video. If you have experience with DSP optimization and custom datapaths, we're ready to get started. Let's discuss. Thanks.

@VladimirG22

With more than 7 years of relevant experience and a keen eye for both hardware and software, I wholeheartedly believe I can contribute to your project by crafting a bespoke solution that aligns perfectly with your needs. My extensive tenure in Embedded Systems and Electronic Device Development has fortified my understanding of FPGA programming and its interaction with various hardware components. Being well-versed in Verilog and VHDL, I can swiftly translate your high-level instruction set and prove its viability through thorough simulation and timing analysis as you require. Moreover, one of my strong suits is the creation of efficient datapaths which are ideal for optimizing DSP slices - a critical aspect given your focus on signal-processing tasks. Having successfully designed IoT devices with wireless communication capabilities, I am adept at leveraging on these technologies, including Bluetooth and Wi-Fi, to enhance functionality where needed.

@hebaa72

Hello, I understand your project requirements and I can build both modules with accurate logic, formulas, and workflow structures. I have strong experience in developing custom modules and organized databases. I can start immediately and deliver high-quality work on time. Thank you.

@oscarc52

Hi, My approach for your project: Translate your instruction set into a synthesizable Verilog/VHDL core optimized for DSP workloads. Develop and simulate a testbench covering all functional vectors. Synthesize the design for your target Xilinx FPGA, verify timing, and check resource usage. Demonstrate the core on-board via video or live session, with immediate iteration if needed. Deliverables: RTL, testbench, Vivado project, timing/resource report, and demo. I have completed several DSP-oriented FPGA cores, ensuring performance and fast turnaround.

@rdklein

I am working with FPGAs since a long time, projects for spectral analysis, or SDR (like my transceivers on MOVEII & IIB in space for 7 and 5 years), Designing a CPU is no problem but takes little time to test and compile all necessary. SO I had to increase the price to be more realistic for professional work.