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Simple VHDL audio project

Since HDL designs describe digital hardware systems for implementation on FPGA’s and ASIC’s, HDL is an ideal tool to design realtime digital signal processing algorithms. This project involves the design and implementation of such digital signal processing algorithms in the field of audio/sound effects.

The goal of the project is to perform some realtime audio processing on a streaming audio source. The result of the processing should be streamed to

some speakers. The development board (Digilent Atlys) contains an audio codec chip (Realtek), a line-in, a microphone and a line-out interface. The chip forms the interface between the FPGA and the audio source/speakers. This implies that some logic has to be made to have access to and to control this audio chip. The FPGA should get its audio from the line-in and/or the microphone input (for example you could use your laptop on the line-in (music) or a microphone on the mic-in (speech), but initially start with one audio input though). The same chip is used to stream the processed audio to the line-out interface.

Some sound effect/altering algorithms should be implemented in the FPGA to do the processing on the streaming audio. Initially start with some basic filter (FIR, lowpass, highpass, notch). These would be on/off controlled by the switchers on the board.

Equipment:

Digilent Atlys FPGA board

Xilinx development software

PC speakers

Audio source (mic, laptop, ...)

Habilidades: Eletrônica, Engenharia, Microcontrolador, Arquitetura de software, Verilog / VHDL

Ver mais: vhdl simple project, audio interface vhdl, software development algorithms, simple design tool, simple algorithms in c, line algorithms, implementation of algorithms, hdl hardware, fir filter design, digital design audio, development of basic algorithms, development of algorithms, architecture design on line, algorithms implementation, Algorithms development, pc board design, audio engineering software, architecture designs, xilinx, vhdl, vhdl fpga, streaming audio, hardware board design, fpga vhdl, fpga / asic

Acerca do Empregador:
( 5 comentários ) Prague, Czech Republic

ID do Projeto: #5141806

4 freelancers estão ofertando em média $279 para este trabalho

ahmedmohamed85

Dear sir, I am the best VHDL programmer at [url removed, login to view] with more than 47 successful projects, please check my profile to be sure that you will get perfect work, also i work in filter design using vhdl

$222 USD in 15 dias
(49 Comentários)
6.2
sachitjani81

lets deal with it.....................................................................................................................

$433 USD in 3 dias
(3 Comentários)
2.0
khanhln

Hi, I'm expert in designing FPGA with HDL. I can surely do it for you. Looking at your document, I assume that each time, only one effect/algorithm is ON, all other one is OFF, controlled by switches on the board, is i Mais

$155 USD in 7 dias
(0 Comentários)
0.0
theinventor2013

A proposal has not yet been provided

$305 USD in 3 dias
(0 Comentários)
0.0