Assembly language program -- 2

Details: The purpose of this project is to help solidify your understanding of the details of how caches and memory work by building a multi-level cache and memory model that processes address traces concurrently on a dual-core CPU. Your caches must support several design options and be configurable. For example, your cache simulator should support different sizes (number of entries), different cache line sizes, and different levels of associativity as described in the following sections. You will need to maintain hit/miss ratio statistics as well as a running average of instruction latencies during execution that will be aggregated into reportable performance metrics upon completion of address trace processing.

Details are attached. I have chapter notes also.

Budget 100$

Time- asap

Habilidades: Montagem, Arquitetura de software, Teste de Software, x86/x64 Assembler

Veja mais: statistics level 2, statistics architecture, architecture statistics, architecture design on line, program design architecture, c language program example, Performance testing , level 2 support, language processing, language options, assembly project, Assembly language, cpu cache, cache simulator program, model design program, program design model, number processes running, testing level support, trace cache, simulator software, model assembly, language program, building execution, cpu simulator program, memory simulator

Acerca do Empregador:
( 169 comentários ) Kolkata, India

ID do Projeto: #6845028

2 freelancers estão ofertando em média $63 para esse trabalho


A proposal has not yet been provided

$100 USD em 1 dia
(2 Comentários)

A proposal has not yet been provided

$25 USD em 1 dia
(0 Comentários)