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verilog ALU design

hi i am student in turkey and i have a project which i cant do it.

basic ALU design with verilog. 32 bits full adder, substruction, negate , left-rigt shift,left-right rot, like that whit spartan 3e starter [url removed, login to view] screen must show the result. cod may not use like a=b+c this is for my graduation can you do that and if you can in a one week how much you want for that? i will glad if you accept

Habilidades: Verilog / VHDL

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Acerca do Empregador:
( 1 comentário ) istanbul, Turkey

ID do Projeto: #6835183

1 freelancer está ofertando em média $150 para este trabalho

ahmedmohamed85

İşveren tarafından İşe Alındı

$150 USD in 10 dias
(118 Comentários)
6.9