implement the high speed deserializer for the DCF and MSF inputs, which samples at 1000 MHz and outputs the data in parallel at 125 MHz
13 freelancers are bidding on average £185 for this job
Hey tightass, I know you want my cock. Yes, yes you do want my cock. I have the full design stack up ya ass. If you are Marc, then go fuck yourself bitch.
I already went through the DCF and MSF signals and 80% of it is coded in VHDL, apart from, this I am very experienced in VHDL, VERILOG programming. I can give you results easily and fast enough
Does this only involves implementing FW? On which platform? What are the DCF and MSF inputs? I would like to get more details on what exactly the project involves.