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VHDL code for high speed hardware deserializer for DCF/MSF signal

implement the high speed deserializer for the DCF and MSF inputs, which samples at 1000 MHz and outputs the data in parallel at 125 MHz

Habilidades: Design Digital, Verilog / VHDL

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Acerca do Empregador:
( 0 comentários ) United Kingdom

ID do Projeto: #6792904

13 freelancers estão ofertando em média £185 para este trabalho

ahmedmohamed85

A proposal has not yet been provided

£277 GBP in 3 dias
(115 Comentários)
6.9
loi09dt1

A proposal has not yet been provided

£200 GBP in 3 dias
(15 Comentários)
4.5
kaveirious

Hey tightass, I know you want my cock. Yes, yes you do want my cock. I have the full design stack up ya ass. If you are Marc, then go fuck yourself bitch.

£150 GBP in 3 dias
(3 Comentários)
4.3
ee4raja

We are experts in VLSI design and verification. We will deliver design, verification environment and implementation in FPGA for the concept

£222 GBP in 30 dias
(4 Comentários)
3.7
smk55

I am Hardware Design Engineer have done MSC system on Chip, University Southampton, UK. I have more than 8 years experience in digital design and well acquainted with ISE, NCverilog, Vivado 2013.4, Altera Quartus 13.0s Mais

£166 GBP in 3 dias
(3 Comentários)
3.2
uetian09ee506

I am working as Lab Engineer at FAST National University Pakistan, in Electrical Department, I have conducted the followings Labs, and also supervised Projects related to these labs. 1. Circuit Analysis and Design Mais

£150 GBP in 2 dias
(1 Comentário)
1.8
jaydeeprangani

My qualification is M.Tech. in VLSI and Embedded System. I have completed Projects on equalizer, mobile text entry system and dc/dc buck converter using VHDL. I also possess proficiency in various areas like Microcontr Mais

£222 GBP in 3 dias
(0 Comentários)
0.0
MURA561

I already went through the DCF and MSF signals and 80% of it is coded in VHDL, apart from, this I am very experienced in VHDL, VERILOG programming. I can give you results easily and fast enough

£200 GBP in 3 dias
(0 Comentários)
0.0
amosdelange

Does this only involves implementing FW? On which platform? What are the DCF and MSF inputs? I would like to get more details on what exactly the project involves.

£150 GBP in 5 dias
(0 Comentários)
0.0
SANGITAR

i m ready to start now, well proficient in VHDL and Verilog,pls visit www.jdmtech.in to know more about me

£277 GBP in 15 dias
(0 Comentários)
0.0
keyurmahant

I, Keyur Mahant working in One of the leading University of India as Asst. Professor in Electronics and Communication Engg. And Space Technology Center as Project Scientist in which, I am working on “Single Event Upset Mais

£150 GBP in 3 dias
(0 Comentários)
0.0
patilpramod080

A proposal has not yet been provided

£55 GBP in 3 dias
(0 Comentários)
0.0
pcrbattini

Bis jetzt wurde noch kein Vorschlag eingegeben

£188 GBP in 7 dias
(0 Comentários)
0.0