digital alarm clock using VHDL

time need to show on the LCD and stop watch need to shows on 7-segments display. my fpga board is DE2 development and education boards.

Habilidades: FPGA, Verilog / VHDL

Ver mais: vhdl, vhdl fpga, verilog vhdl, fpga vhdl, digital display, alarm, vhdl digital alarm clock, digital watch, alarm clock using vhdl, digital alarm clock verilog, digital clock alarm verilog, fpga alarm clock, alarm clock vhdl, alarm clock using verilog, vhdl clock alarm, digital clock alarm vhdl, verilog alarm, alarm clock verilog, verilog lcd, fpga lcd vhdl, fpga vhdl verilog, fpga board, lcd verilog, stop watch using vhdl, fpga development

Acerca do Empregador:
( 0 comentários ) Singapore

ID do Projeto: #6839751

10 freelancers estão ofertando em média $128 para este trabalho


Dear sir, I already have the DE2 board, i have more than 7 years experience in digital design using VHDL please message me so that we can discuss project details

$30 SGD em 1 dia
(121 Comentários)

I have had more than 3 years experiences on FPGA Design using Verilog and VHDL: - FPGA's Xilinx and Altera. - MicroBlaze, Embedded system design on FPGA of Xilinx. - FPGA, VLSI Implementation of DSP System( Matlab o Mais

$147 SGD in 3 dias
(23 Comentários)

I can help you right away! I have 8 years experience with vhdl and fpga! I worked for TTTech and Infineon and Philips as a digital design engineer! I can help you right away! Please send me a message to talk more Mais

$77 SGD in 0 dias
(8 Comentários)

I am working as Lab Engineer at FAST National University Pakistan, in Electrical Department, I have conducted the followings Labs, and also supervised Projects related to these labs. 1. Circuit Analysis and Design Mais

$31 SGD in 2 dias
(3 Comentários)

i am an electrical engineer and i also have experience using FPGA board and verilog language which makes me suitable candidate for this job.

$155 SGD in 3 dias
(0 Comentários)

A proposal has not yet been provided

$166 SGD in 3 dias
(0 Comentários)

Hi, I am a PhD student @ University of Califonia. I have 6+ years FPGA and VHDL experiences. I can finish this job with 100% guarantee and good documentation.

$120 SGD in 3 dias
(0 Comentários)

I have worked on designing IP using verilog on Altera FPGA. I have also worked on optical communication where I used 8 bit ADC for analog to digital conversion. I have DE2-115 board and I can promise you that I will g Mais

$155 SGD in 4 dias
(0 Comentários)

I, Keyur Mahant working in One of the leading University of India as Asst. Professor in Electronics and Communication Engg. And Space Technology Center as Project Scientist in which, I am working on “Single Event Upset Mais

$155 SGD in 3 dias
(0 Comentários)

Dear Employer, I can support you for development of this project. Have earlier worked on this board for small scale projects. Here is my profile summary for your reference: Experience in Digital ASIC/FPGA Design, Mais

$244 SGD in 7 dias
(0 Comentários)