design a real time fft core using vhdl for 1024 point 16-bit radix 4 algorithm and implement on spartan 3E starter kit. the input to fft will be a image and output is to be display on the monitor.
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Hi I have prior experience in writing FFT code , I got the idea how to write 16 bit radix 4 algo. it is staged/step design , please let me know how to take this further.
We are experts in VLSI industry with 7 years of experience. We have our FFFt algorithm working in FPGA kit with similar to your setup. Please send us personal message to discuss things further