Required the verilog implementation of N bit Montgomery Radix 8 bit multiplier and for addition use the CLA adder.
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Hi I am a researcher in vlsi. I have designed the arithematic modules using verilog. You can check my portfolio for recent projects in verilog. Kindly share your details on chat for this project. Thank you
Greetings, I am an Electrical Engineer having expertise with verilog in Xilinx. I have read your project and can definitely do to for you. Hope to work with you soon. Thanks and regards.