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Development of the WebP image compression algorithm in an FPGA as embedded system - repost2

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Essay Language : English

Dissertation Chapter

Size : 80 pages

Deadline :

Faculty: : Electronics and Computer Engineering

Essay Tittle : Development of the WebP image compression algorithm in an FPGA as embedded system

Subject Title : Embedded systems

Details : The development must be done using the VHDL programming language and fully functional in Xilinx FPGA platforms, such as Spartan, Virtex, Zinq, using the Xilinx IDE and EDK suit. It should be fully developed for parallel process of data. Speed measurement and comparison to the JPEG standard for size and compression speed. Required Block diagram, Development process and Code (not counted in pages).

Habilidades: Verilog / VHDL

Ver mais: verilog programming, systems programming language, programming language speed comparison, programming language speed, programming language comparison, ide programming, fpga programming language, embedded systems fpga programming, development algorithm, computer systems programming, computer programming algorithm, algorithm computer programming, algorithm computer, standard image size, programming fpga, xilinx, xilinx system, vhdl, vhdl fpga, verilog vhdl, system verilog, spartan, parallel programming, jpeg compression, image fpga

Acerca do Empregador:
( 7 comentários ) Kavala, Greece

ID do Projeto: #5103100

3 freelancers estão ofertando em média €177 para este trabalho

Quadrupole

I have an experience in VHDL programming. I have Digilent Nexys 2 board and I can debug and test my VHDL code using this board

€222 EUR in 7 dias
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abasit89

A proposal has not yet been provided

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ENGKAM

Hi, Can you explain what is the job ? To write an essay or to write code implemented on xilinx ? What is the algorithm ? Amir

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