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Looking for an Xilinx vivado FPGA programming and Matlab HDL coder expert.

I'm looking for a FPGA Firmware engineer who has rich experience in FPGA and VHDL/verilog programming. The right candidate should have an experience in Matlab and HDL Coder. The board is Zynq FPGA controller.

The project is to implemente a Xilinx partial reconfiguration model for an SDR on the AD9361-Z7035 with ADRV1CRR-BOB. Also should have telecommunication knowledge.

Please bid with the word "Matlab/HDL".

Habilidades: Verilog / VHDL, Matlab and Mathematica, FPGA, Engenharia de Telecomunicações, Software Integrado

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Acerca do Empregador:
( 3 comentários ) Chisinau, Moldova, Republic of

ID do Projeto: #29406702

8 freelancers estão ofertando em média $21/hora nesse trabalho

ilyarotov02

Looking forward to your response. I am senior matlab developer with 10 years of experience. I have worked on matlab, C++, C#, python. I have a lot of experiences in many "Matlab/HDL" Projects. We can chat in more d Mais

$20 USD / hora
(88 Comentários)
6.4
(27 Comentários)
4.8
LoganathanN

MATLAB/HDL Hello team. We have seen your requirement is that you need to implement some algorithm in ZC706 carrier board with AD9361 evaluation modular for a signal processing application. I’m well experienced with t Mais

$17 USD / hora
(15 Comentários)
4.4
wjavaid046

FPGA + MATLAB Expert Here I carefully read your project requirements and I understand that you want to design FPGA verilog based project, yes I will design it for you just in 4 to 5 hours from now. I am expert in this Mais

$20 USD / hora
(14 Comentários)
4.0
taamouchabdelhak

Matlab/HDL, Hi, I am a VHDL and FPGA developer i can do the task perfectly. I also worked using FPGA in the loop using Matlab and Simulink. Please contact me. I have much experience with what you are looking for

$20 USD / hora
(10 Comentários)
3.6
ghaziaoussaji

Hello, I am an electrical engineer and microelectronics is my major. I also have a master thesis in communication systems. I am currently working as an embedded system engineer in the telecommunication field. My work Mais

$20 USD / hora
(0 Comentários)
0.0
sudowski27

Matlab/HDL Hi, im enginner from WUT in Warsaw. I have very rich experience with Matlab and HDL( I prefers Verilog). Recently I completed huge DSP block(with IIR filters, etc). I have telecommunication knowladge abot Mais

$20 USD / hora
(0 Comentários)
0.0
dhruvnagadia

Hello, Greetings of the day !!! This is Dhruv. Our team has already worked on this before and have rich experience in zynq FPGA and VHDL/verilog programming since last then 10 years. Currently we are working on ultra Mais

$25 USD / hora
(0 Comentários)
0.0