software writing - open to bidding

work on DLX processor architecture

implementation of Peter J. Ashenden written using GHDL, an open-source implementation of


Habilidades: Verilog / VHDL

Veja mais: open source vhdl, j software, vhdl, verilog vhdl, writing architecture, open bidding, Architecture writing, processor vhdl, vhdl implementation, open source bidding, verilog bidding, vhdl processor, vhdl software

Acerca do Empregador:
( 0 comentários ) Herat, Turkey

ID do Projeto: #6838635

3 freelancers estão ofertando em média $153 para esse trabalho


As I know DLX is risc acrchitecture and I can implement this in given time time. The DLX is essentially a cleaned up (and modernized) simplified MIPS CPU. The DLX has a simple 32-bit load/store architecture, somewha Mais

$138 USD in 3 dias
(7 Comentários)

I am working as Lab Engineer at FAST National University Pakistan, in Electrical Department, I have conducted the followings Labs, and also supervised Projects related to these labs. 1. Circuit Analysis and Design Mais

$155 USD in 3 dias
(3 Comentários)

Hi I am Veerender with 8 yrs of experience in VHDL/Verilog code development. Do supporting Phd candidates in their research work , solving assignments for M.S students , Mtech IEEE projects development. Awaitin Mais

$166 USD in 3 dias
(0 Comentários)