Verilog Project for school

The project report must include:

1)Project definition and characterization

2)Concept development and logical design

3)Design entry using Verilog HDL and functional simulation with enough input data and verification

4)Synthesis and implementation with the .ucf file specified

5)Time simulation with enough input data

6)Downloading and Testing

Design/Synthesis/Implementation MUST be done using Xilinx ISE Tools and Spartan 3E or Spartan 6(NEXYX 3) Board.

I need a freelancer that can do this project and then either walk me through the process or make a video walk through.

The attached file contains the project description.

Habilidades: Verilog / VHDL

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Acerca do Empregador:
( 3 comentários ) Loves park, United States

ID do Projeto: #5145782

Premiar a:


Hi, I'm a Verilog HDL and VHDL expert with 15+ and 13+ years experience, respectively. I have implemented more than 125 designs for third parties/clients including MSF/DCF77 decoder, FFT, RISC processors, ASIPs for ima Mais

$220 USD em 4 dias
(2 Avaliações)

Hi dear.I can do this job..I have already worked with you I hope we can communicate better for the next [url removed, login to view] you want to discus please contact me.

$170 USD em 3 dias
(23 Avaliações)

10 freelancers are bidding on average $172 for this job


Dear sir, I am the best verilog programmer at, i will provide you with the project in addition to online assistance using skype

$172 USD in 3 dias
(304 Comentários)

Hi, I am a graduate in EEE.I have 15 years of experience in programming,electronic design and teaching.I can do this work for you. I have good experience in verilog/vhdl FPGA design. (My current project is a 32 bi Mais

$111 USD in 7 dias
(2 Comentários)

A proposal has not yet been provided

$200 USD in 3 dias
(1 Comentário)

Hi could u tell me what do u want to implement i read the document , its not assignment its like walk trought ............................................................................................... Mais

$210 USD in 7 dias
(0 Comentários)

Предложение еще не подано

$200 USD in 5 dias
(0 Comentários)

I have good skills and practical knowledge to develop the requirement for the project.I have can design with easier technique which every one can understand

$77 USD in 3 dias
(0 Comentários)

A proposal has not yet been provided

$172 USD in 3 dias
(0 Comentários)

Hi.. I am sathish , Project head in 5amperes.. We work on projects on matlab and verilog. We are good at digital design + synthesis + implementation on board.. We can deliver u evrythin in a perfect manner within the d Mais

$190 USD in 3 dias
(0 Comentários)