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$70 USD / hora
Bandeira do(a) ARGENTINA
san rafael, argentina
$70 USD / hora
No momento são 12:04 PM aqui
Entrou no Freelancer em julho 3, 2018
0 Recomendações

Fernando Andres G.

@FernandoAGV

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5,0 (7 avaliações)
8,5
8,5
$70 USD / hora
Bandeira do(a) ARGENTINA
san rafael, argentina
$70 USD / hora
100%
Trabalhos Concluídos
100%
Dentro do Orçamento
100%
No Prazo
20%
Taxa de Recontratação

Sr. Digital Hardware Design / Firmware Engineer

Hi there! My name is Fernando, I'm a Senior Electronic Engineer with advanced knowledge of digital signal processing and experience in design/development of embedded systems implemented with DSP, FPGA and Microcontrollers. I have 10+ years of experience in the Aerospace, IC and IoT (Internet of Things) industries, working in multidisciplinary teams, performing the following tasks: - Team leadership - Planning and project management - Digital Signal Processing (FIR and IIR Filtering, LMS, FFT) - Electronic / circuit design - High-speed digital design on FPGAs (VHDL/Verilog) - Embedded software development (C programming) - PCB layout - MAIT (Manufacturing, Assembly, Integration and Test) - Validation in laboratory - Writing of technical documentation I love working on complex designs, it motivates me. I have the ability to solve problems, seriousness and responsibility to carry out the work in the best way. My working hours are Monday to Friday from 9:00 am to 6:00 pm (GMT -3). FEATURED REVIEW "Fernando has been a real pleasure to work with on this project. He's very meticulous in his work which is a critical attribute to being a successful engineer/consultant. He's capable of high quality deliverables along with excellent documentation/communication skills. I will continue to leverage his expertise in the future provided he enjoys the work he is doing for Power Down Semiconductor as the relationship has to work both ways." - David H.
Freelancer Verilog / VHDL Designers Argentina

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Itens de Portfólio

Design and development of a controller based on FPGA (Spartan 6) for testing displays that have a MIPI DSI interface. The client needed to test displays of different models of smartphones from a well-known brand.
Test Controller for MIPI DSI Display
Design and development of a controller based on FPGA (Spartan 6) for testing displays that have a MIPI DSI interface. The client needed to test displays of different models of smartphones from a well-known brand.
Test Controller for MIPI DSI Display
Design and development of a controller based on FPGA (Spartan 6) for testing displays that have a MIPI DSI interface. The client needed to test displays of different models of smartphones from a well-known brand.
Test Controller for MIPI DSI Display
Design and development of a controller based on FPGA (Spartan 6) for testing displays that have a MIPI DSI interface. The client needed to test displays of different models of smartphones from a well-known brand.
Test Controller for MIPI DSI Display
Design and development of a controller based on FPGA (Spartan 6) for testing displays that have a MIPI DSI interface. The client needed to test displays of different models of smartphones from a well-known brand.
Test Controller for MIPI DSI Display
Design and development of a controller based on FPGA (Spartan 6) for testing displays that have a MIPI DSI interface. The client needed to test displays of different models of smartphones from a well-known brand.
Test Controller for MIPI DSI Display
Design and development of a controller based on FPGA (Spartan 6) for testing displays that have a MIPI DSI interface. The client needed to test displays of different models of smartphones from a well-known brand.
Test Controller for MIPI DSI Display
Design and development of a controller based on FPGA (Spartan 6) for testing displays that have a MIPI DSI interface. The client needed to test displays of different models of smartphones from a well-known brand.
Test Controller for MIPI DSI Display
Design and development of a controller based on FPGA (Spartan 6) for testing displays that have a MIPI DSI interface. The client needed to test displays of different models of smartphones from a well-known brand.
Test Controller for MIPI DSI Display
Design and development of a controller based on FPGA (Spartan 6) for testing displays that have a MIPI DSI interface. The client needed to test displays of different models of smartphones from a well-known brand.
Test Controller for MIPI DSI Display
Design and development of a controller based on FPGA (Spartan 6) for testing displays that have a MIPI DSI interface. The client needed to test displays of different models of smartphones from a well-known brand.
Test Controller for MIPI DSI Display
Design and development of a controller based on FPGA (Spartan 6) for testing displays that have a MIPI DSI interface. The client needed to test displays of different models of smartphones from a well-known brand.
Test Controller for MIPI DSI Display
The implementation of a feedback ANC applied to a headset was done using a low cost, 16 bits, fixed point DSP StarCore MSC7116 from Freescale. The DSP program runs over SmartDSP (RTOS). The board has also integrated the stereo 16 bit CODEC AK4554. 
The noise inside the headset may vary over time because the external noise has changed, or because the headset has moved, changing its acoustic transfer function. The ANC system must be able to adapt to these changes, modifying the produced anti-noise signal accordingly. The ANC adaptive filters are made of a Finite Impulse Response (FIR) filter with varying coefficients. In order to compensate the effect of S(z) the input to the adaptive algorithm has to be affected (filtered) in the same way as the controller´s output. The modified algorithm is then called Filtered x Least Mean Squares (FxLMS) algorithm. As S(z) is unknown and may vary on time, it is identified by a second adaptive system and a copy of its transfer function, S^(z), is intr
Adaptive Narrowband ANC System
The implementation of a feedback ANC applied to a headset was done using a low cost, 16 bits, fixed point DSP StarCore MSC7116 from Freescale. The DSP program runs over SmartDSP (RTOS). The board has also integrated the stereo 16 bit CODEC AK4554. 
The noise inside the headset may vary over time because the external noise has changed, or because the headset has moved, changing its acoustic transfer function. The ANC system must be able to adapt to these changes, modifying the produced anti-noise signal accordingly. The ANC adaptive filters are made of a Finite Impulse Response (FIR) filter with varying coefficients. In order to compensate the effect of S(z) the input to the adaptive algorithm has to be affected (filtered) in the same way as the controller´s output. The modified algorithm is then called Filtered x Least Mean Squares (FxLMS) algorithm. As S(z) is unknown and may vary on time, it is identified by a second adaptive system and a copy of its transfer function, S^(z), is intr
Adaptive Narrowband ANC System
The implementation of a feedback ANC applied to a headset was done using a low cost, 16 bits, fixed point DSP StarCore MSC7116 from Freescale. The DSP program runs over SmartDSP (RTOS). The board has also integrated the stereo 16 bit CODEC AK4554. 
The noise inside the headset may vary over time because the external noise has changed, or because the headset has moved, changing its acoustic transfer function. The ANC system must be able to adapt to these changes, modifying the produced anti-noise signal accordingly. The ANC adaptive filters are made of a Finite Impulse Response (FIR) filter with varying coefficients. In order to compensate the effect of S(z) the input to the adaptive algorithm has to be affected (filtered) in the same way as the controller´s output. The modified algorithm is then called Filtered x Least Mean Squares (FxLMS) algorithm. As S(z) is unknown and may vary on time, it is identified by a second adaptive system and a copy of its transfer function, S^(z), is intr
Adaptive Narrowband ANC System

Avaliações

Mudanças salvas
Mostrando 1 - 5 de 7 avaliações
Filtrar avaliações por: 5,0
$161.468,79 USD
Fernando has been a real pleasure to work with on this project. He's very meticulous in his work which is a critical attribute to being a successful engineer/consultant. He's capable of high quality deliverables along with excellent documentation/communication skills. I will continue to leverage his expertise in the future provided he enjoys the work he is doing for Power Down Semiconductor as the relationship has to work both ways.
Electronics Verilog / VHDL Microcontroller Electrical Engineering FPGA Coding
Avatar do Usuário
Bandeira do(a) David H. @huffdave
há 1 ano
5,0
€1.150,00 EUR
I am very pleased with Fernando, he completed the job, his expertise was spot on and he provided extra support to help me debug some of my issues. I will hire him again for sure
Electronics Verilog / VHDL Microcontroller FPGA FPGA Coding
L
Bandeira do(a) Loic C. @Loic74650
há 3 anos
5,0
£350,00 GBP
This guy is the best at what he does, when he says he will deliver to a standard beyond your expectations this is without a doubt an understatment - price is therefore justified completley and he is a very flexible and easy communicator, very proffessional and friendly - if he has a skill set you are looking for he is your guy!
Avatar do Usuário
Bandeira do(a) Mansour A. @omarnoor2000
há 3 anos
5,0
$150,00 USD
Fernando is very thoughtful with his approach and asks many questions to ensure you are getting what you need. He produced a quality VHDL code for me and I am very satisfied. I will definitely look for Fernando if I need more coding work completed.
Electronics Verilog / VHDL Microcontroller Electrical Engineering FPGA
Avatar do Usuário
Bandeira do(a) Michael S. @Mkthomassmith
há 3 anos
5,0
$341,00 SGD
Super efficient and trustworthy . You won't have to worry with his deep knowledge and understanding of coding. He delivers everything that i needed with guidance too. I initially hired a freelancer with 60+ reviews but he didn't complete my job as agreed and mia-ed. Eventho Fernando has only 3 reviews but his standard and level of work is really professional. I recommend him to all of you out there that needs help on hardware programming. Thanks again.
C Programming Engineering Verilog / VHDL Manufacturing Design
+1 mais
Avatar do Usuário
Bandeira do(a) Adol Y. @joviyeung
há 3 anos

Experiência

PDS430E2272 - Digital Design Engineer/Consultant

Power Down Semiconductor (Freelancer.com)
mar. 2020 - ago. 2021 (1 ano, 5 meses)
Power Down Semiconductor is developing ultra-low power ICs for the energy harvesting market. Through Freelancer.com I worked in the first production part of the company, the PDS430E2272 16-bit MCU, doing the following main tasks: - Verilog RTL Development of the Digital Modules - FPGA Prototyping - Memory BIST and Bootloader Code Development

IoT Project Electronic Responsible

INVAP S.E.
jan. 2017 - ago. 2018 (1 ano, 7 meses)
Electronic design of the IoT project Tag. Design of automated tests for Tags. Coordination and monitoring of development, manufacturing and automated testing of Tags. Compliance with quality standards. Development of the associated technical documentation.

SAOCOM Satellite Ground Station Extensions (GSX) Team Leader

INVAP S.E.
jul. 2017 - dez. 2017 (5 meses, 1 dia)
Leadership of the work team for the manufacture of the Extensions (GSX). Negotiation and definition of the scope of the project with the CONAE client. Planning and budgeting of the project. Estimation of resources, costs, and duration. Management, coordination and monitoring. Development of the associated technical documentation.

Educação

Electronic Engineer

Universidad Nacional de Córdoba, Argentina 2001 - 2011
(10 anos)

Electronic Technician

Argentina 1994 - 1999
(5 anos)

Publicações

FxLMS and MFxLMS Stability Constrains when used in Active Noise Control

IEEE
This paper presents a comparison of the stability of the MFxLMS and FxLMS algorithms, applied to the low frequency narrowband Active Noise Control (ANC). This work focuses on the study of the secondary path in a headset, and the effect of its variations in the system's stability. The analysis is completed with simulations that support the conclusions. https://ieeexplore.ieee.org/document/6502805

Adaptive Narrowband ANC, Design and Implementation Issues

IEEE
This paper presents the design and implementation of an adaptive feedback Active Noise Control (ANC) to cancel the low frequency narrowband noise remaining inside a headset shell. The implementation issues were addressed and tested on a commercial fixed point Digital Signal Processor (DSP). https://ieeexplore.ieee.org/abstract/document/5993725

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Principais Habilidades

Verilog / VHDL 10 FPGA 9 C Programming 5 Electronics 5 Microcontroller 4

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