Designing SOPC with QSYS tool
Designing SOPC with QSYS tool . Integrating NIOS II soft-core processor and other peripherals.
Senior Embedded Systems Engineer (HW/FW Design) -Embedded C programming. -RISC assembly programming and optimization. -Bare-metal, BSP and RTOS Application Development (uC/OS III , FreeRTOS). -Developed on 8-bit PIC series of Micro-Chip, 8-bit AVR of Atmel ,16-bit MSP of Texas Instruments (MSP430), 32-bit ARM-based microcontrollers of NXP (LPC), ST (STM32F) and Nordic (nRF52) SoC. -Developed using MPLAB X IDE , Atmel Studio , Code Composer Studio and uVision KEIL IDE. - FPGA digital design, writing VHDL test benches and working with simulators such as ModelSim. -Designing and implementing SOPC systems (Intel FPGAs and NIOS II soft processor) using Quartus II and Nios II Software Build Tools . -Building SOC systems (Xilinx Zynq series) using the Vivado IDE and Xilinx SDK. -High-Speed PCB routing with Altium Designer and Eagle Professional.