I'd like to invite you to take a look at the job I've posted. Please submit a proposal if you're available and interested.
It is about a few hour job. I am using the Deo Nano SoC. I have partitioned the RAM and I can write 32bit words to the partitioned area. I have been fighting with Quartus for a while. I can do everything else on this project. I would provide the c-code so you could see how it writes a string of words to the RAM. I also have some VHDL code if you like that is about 98% there. A person skilled in VHDL and using Quartus should be able to write the code from scratch in about an hour or so. My hope is to read a large chunk of data from the HPS in groups of 16 or 32. The data would be put in a fifo array of about 300 elements allowing me to toggle out about 150 words at a time. The total baud rate needed would be about 1 MB/s. That is about it.
Dear sir
I have more than 10 years experience in digital design using FPGA, also I have worked with Cyclone V and HPS ports before, please message me so that we can discuss