Need to Make Shift/Add Multiplier in VHDL - have specs already

Dear sir I have more than 10 years experience in digital design using vhdl please check my profile also please message me so that we can discuss

A FPGA/IC design expert with 7+ years experience and hundreds of FPGA/Verilog/VHDL projects using Xilinx/Altera FPGA Design Tools and Digital Logic Design using LogiSim/CEDAR. Founder of FPGA4student. Expertise: FPGA, Verilog, VHDL, Xilinx ISE, Vivado, Altera Quartus, Modelsim, Logisim, CEDAR, MIPS Assembly, PLP Tools, Qtspim, MARS, PCB Design, Altium Designer, OrCAD, PSpice, Proteus, Arduino, CMOS VLSI Design, Cadence Virtuoso, Layout XL, Digital IC Design from RTL to GDSII, Analog IC Design.

I have well experienced in doing such kind of jobs.............................................................................

hi, I am a senior digital design engineer, I have a wide knowledge in digital design in ASIC and FPGA using both VHDL and Verilog. I am using Vivado, ISE and Quartise. I will provide you a professional report about your project with citation and scientific formatting. Please contact me to know more about your needs. Regards, moaaz.

Hi I’m an expert in vhdl design and I’m interested in your project I can help you Send me a message to discuss the details

I have extensive knowledge on digital design. I can design 8-bit shifter/adder/multiplier in vhdl. drop a line for any questions you might have best regards

Hi, I am Mtech graduate from IIT Roorkee and working on Hardware Description Languages Verilog and VHDL for the past 3 years. I have done many Digital system design projects using RTL design and FSM and had a working experience on FPGA boards. And I have recently designed a Multi cycled pipelined CPU using RISC -V instruction set and a game called Whack a mole. You can refer to my portfolio item "sequence detection 101" designed using finite state machines and Sample Verilog and VHDL codes written at https://www.freelancer.com/u/vinendra77 Thank you

Hello, I am a Softwre Engineer I have good exprince in digital design please chat with me for more details

Hello, I have implemented a four bits serial-paralell multiplier using packages and components (using and, flip flop and pipelined) in VHDL. Convert it to 8 bit multiplier is a very easy task, only instantiating 4 extra components the work is done. Please, contact me on chat for details, I can send you a schematic photo and we agree every term before you make me the milestone payment. I can do the task using Altera Quartus, I will send you code, schematic, flow chart and everything you need. I am telecommunications and electronics engineer. I wait your answer, you will not apologize, best regards

hi i have working expertise in designing using VHDL. the design will be done in vivado hence it will be easily ported to any other target device you want.

Hello I'm your best choice in FPGA design, recently hace created an ALU which does shifts, multiplication and adds numbers. My english level is FCE C1, don't expect language barrier issues when talking to me.

Hi, I’m a verilog design engineer with 3+ years of experience, I can help you develop a verilog Code. Please share more details on chat. For other details please visit my profile. Thanks Vishnu

I'm an FPGA & Embedded Design Engineer and a Physicist. I have done many research project on various FPGA and micro-processor platforms including: PIC16, 18, 24 devices, Arduino, Genesys Vertex-V, Vertex-IV, ALTERA Cyclone-V, ZYNQ Zedboard, ZYNQ UltraScale+ , Micron AC-510, Micron SB-852 FPGA boards and many more. Among other things, I have experience in building various Linux Distributions for ARM processors on SoC chips. As mentioned above, I had cross-compiled linux kernels for Cortex A9 processors on ZYNQ Zedboard and UltraScale+ SoC FPGAs. Furthermore, I have also worked on implementing Machine Learning (ML) algorithms on FPGAs. Previously, I implemented complex neural networks on micron AC-510 board and ran inferences on it. Please refer to my profile if you need to have more information about my experience and skills. I will make this 8-bit shift/add and also provide you with its simulation. So that, you can confirm it's working. Thanks

Hi, We are a team of experts in HDL coding (Verilog/VHDL) for the past 5 years. We can deliver you the 8-bit shift/add multiplier VHDL code and testbench with a detailed report of your design in a short span of time. Please message as so that we can discuss further. With regards, ARRayMinds.

I just finished learning VHDL, Verilog and FPGAs this summer during lockdown. I am currently working on building an image processing pipeline for autonomous vehicle (Finished building the noise removal module currently), but I paused working on this project as I will be back to university on 17/10. I was looking for something to do till then and I think I can do what you want with ease. I did a lot of similar stuff during learning.

I am experienced ASIC design and verification engineer, have three years of experience in VLSI field.