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C Programming Electronics Matlab and Mathematica Verilog / VHDL Wireless
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$25 USD / hora
Bandeira do(a) PAKISTAN
islamabad, pakistan
$25 USD / hora
No momento são 5:25 PM aqui
Entrou no Freelancer em janeiro 16, 2008
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Bcube G.

@hassaanshakil

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$25 USD / hora
Bandeira do(a) PAKISTAN
islamabad, pakistan
$25 USD / hora
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C/C++, Python, Docker, MATLAB, DSP, FPGA, HDL,

With over 20 years experience in electronics, We at Bcube Global strive for success of businesses and products. Masters in the field of High speed PCB design, FPGAs, verilog,VHDL and RF/MW circuit design, once chosen, We guarantee satisfaction at our end. Our team of engineers have worked on high speed PCBs stuffed with FPGAs, Processors, DDR2/3 interfaces, PHY chips and LVDS Signals all MANUALLY ROUTED. With IBIS models, We can SHOW you a PCB working on computer hence reducing risk of redesign. On FPGAs side, Our engineers have worked on most recent technologies like USB 3.0 Host IP core, DDR3 IP, 8051 IP and hybrid memory cube controller IP to name a few. We specialize in development of ultra-wide band RF/MW systems and sub-systems for wireless applications. We look forward to serve you professionally and up to your standards.
Freelancer C Programmers Pakistan

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Itens de Portfólio

We develop 2D and 3D drawings using Autodesk AutoCAD.
2D/3D CAD drawings
We design RF/MW circuits and PCBs. We have design capabilities of passive circuits including filters, power dividers, multiplexers, couplers etc. and active circuits like Low noise amplifiers, High power amplifiers, oscillators, mixers etc.

We design and layout custom high frequency PCBs for different ICs (LP, LC, QFN etc packages) including evaluation boards. We also design complete RF/MW systems including transmitters, receivers, up/down converters, local oscillators etc. 

We also provide fabrication and testing services for circuits up to 20 GHz.
RF/Microwave circuits and systems
We design RF/MW circuits and PCBs. We have design capabilities of passive circuits including filters, power dividers, multiplexers, couplers etc. and active circuits like Low noise amplifiers, High power amplifiers, oscillators, mixers etc.

We design and layout custom high frequency PCBs for different ICs (LP, LC, QFN etc packages) including evaluation boards. We also design complete RF/MW systems including transmitters, receivers, up/down converters, local oscillators etc. 

We also provide fabrication and testing services for circuits up to 20 GHz.
RF/Microwave circuits and systems
A Systematic Technique for Hardware/Software Codesign Applied to Design of Sub-optimal MIMO Decoder. In this work we present a novel FPGA cost estimation technique to assist in design space exploration. Main strength of the technique is the ability to calculate area and speed estimates from higher level implementation such as MATLAB. This approach not only saves significant amount of time, but also provides the designer the opportunity to evaluate multiple algorithms from implementation perspective before actually starting the implementation phase. Our technique that makes use of pre-implemented libraries to develop fine estimates for different possible hardware architectures for a given algorithm. 
While our technique can be applied to any algorithm, we restrict ourselves to MIMO systems. We then implement this architecture using Xilinx Zynq-7000 device and compare actual results with the expected ones.
A Systematic Technique for Hardware/Software Codesign.
A Systematic Technique for Hardware/Software Codesign Applied to Design of Sub-optimal MIMO Decoder. In this work we present a novel FPGA cost estimation technique to assist in design space exploration. Main strength of the technique is the ability to calculate area and speed estimates from higher level implementation such as MATLAB. This approach not only saves significant amount of time, but also provides the designer the opportunity to evaluate multiple algorithms from implementation perspective before actually starting the implementation phase. Our technique that makes use of pre-implemented libraries to develop fine estimates for different possible hardware architectures for a given algorithm. 
While our technique can be applied to any algorithm, we restrict ourselves to MIMO systems. We then implement this architecture using Xilinx Zynq-7000 device and compare actual results with the expected ones.
A Systematic Technique for Hardware/Software Codesign.
A Systematic Technique for Hardware/Software Codesign Applied to Design of Sub-optimal MIMO Decoder. In this work we present a novel FPGA cost estimation technique to assist in design space exploration. Main strength of the technique is the ability to calculate area and speed estimates from higher level implementation such as MATLAB. This approach not only saves significant amount of time, but also provides the designer the opportunity to evaluate multiple algorithms from implementation perspective before actually starting the implementation phase. Our technique that makes use of pre-implemented libraries to develop fine estimates for different possible hardware architectures for a given algorithm. 
While our technique can be applied to any algorithm, we restrict ourselves to MIMO systems. We then implement this architecture using Xilinx Zynq-7000 device and compare actual results with the expected ones.
A Systematic Technique for Hardware/Software Codesign.
A Systematic Technique for Hardware/Software Codesign Applied to Design of Sub-optimal MIMO Decoder. In this work we present a novel FPGA cost estimation technique to assist in design space exploration. Main strength of the technique is the ability to calculate area and speed estimates from higher level implementation such as MATLAB. This approach not only saves significant amount of time, but also provides the designer the opportunity to evaluate multiple algorithms from implementation perspective before actually starting the implementation phase. Our technique that makes use of pre-implemented libraries to develop fine estimates for different possible hardware architectures for a given algorithm. 
While our technique can be applied to any algorithm, we restrict ourselves to MIMO systems. We then implement this architecture using Xilinx Zynq-7000 device and compare actual results with the expected ones.
A Systematic Technique for Hardware/Software Codesign.
A Systematic Technique for Hardware/Software Codesign Applied to Design of Sub-optimal MIMO Decoder. In this work we present a novel FPGA cost estimation technique to assist in design space exploration. Main strength of the technique is the ability to calculate area and speed estimates from higher level implementation such as MATLAB. This approach not only saves significant amount of time, but also provides the designer the opportunity to evaluate multiple algorithms from implementation perspective before actually starting the implementation phase. Our technique that makes use of pre-implemented libraries to develop fine estimates for different possible hardware architectures for a given algorithm. 
While our technique can be applied to any algorithm, we restrict ourselves to MIMO systems. We then implement this architecture using Xilinx Zynq-7000 device and compare actual results with the expected ones.
A Systematic Technique for Hardware/Software Codesign.
A Systematic Technique for Hardware/Software Codesign Applied to Design of Sub-optimal MIMO Decoder. In this work we present a novel FPGA cost estimation technique to assist in design space exploration. Main strength of the technique is the ability to calculate area and speed estimates from higher level implementation such as MATLAB. This approach not only saves significant amount of time, but also provides the designer the opportunity to evaluate multiple algorithms from implementation perspective before actually starting the implementation phase. Our technique that makes use of pre-implemented libraries to develop fine estimates for different possible hardware architectures for a given algorithm. 
While our technique can be applied to any algorithm, we restrict ourselves to MIMO systems. We then implement this architecture using Xilinx Zynq-7000 device and compare actual results with the expected ones.
A Systematic Technique for Hardware/Software Codesign.
This portfolio contains samples of our work completed over time for different clients. Our work included developing MATLAB based instrumentation, algorithm development (image-processing), and simulations for 4G LTE uplink and downlink and graphical user interface (GUI) design.
MATLAB simulations and algorithm development
This portfolio contains samples of our work completed over time for different clients. Our work included developing MATLAB based instrumentation, algorithm development (image-processing), and simulations for 4G LTE uplink and downlink and graphical user interface (GUI) design.
MATLAB simulations and algorithm development
This portfolio contains samples of our work completed over time for different clients. Our work included developing MATLAB based instrumentation, algorithm development (image-processing), and simulations for 4G LTE uplink and downlink and graphical user interface (GUI) design.
MATLAB simulations and algorithm development
This portfolio contains samples of our work completed over time for different clients. Our work included developing MATLAB based instrumentation, algorithm development (image-processing), and simulations for 4G LTE uplink and downlink and graphical user interface (GUI) design.
MATLAB simulations and algorithm development
This portfolio contains samples of our work completed over time for different clients. Our work included developing MATLAB based instrumentation, algorithm development (image-processing), and simulations for 4G LTE uplink and downlink and graphical user interface (GUI) design.
MATLAB simulations and algorithm development
This portfolio contains samples of our work completed over time for different clients. Our work included developing MATLAB based instrumentation, algorithm development (image-processing), and simulations for 4G LTE uplink and downlink and graphical user interface (GUI) design.
MATLAB simulations and algorithm development
This portfolio contains some high speed, high density PCBs that we have developed over time for different clients. These PCBs contained FPGAs, DSPs, RAMs with fine pitch BGA packages with single-ended and differential links operating at up to 9GBPS.
High speed PCB design
This portfolio contains some high speed, high density PCBs that we have developed over time for different clients. These PCBs contained FPGAs, DSPs, RAMs with fine pitch BGA packages with single-ended and differential links operating at up to 9GBPS.
High speed PCB design
This portfolio contains some high speed, high density PCBs that we have developed over time for different clients. These PCBs contained FPGAs, DSPs, RAMs with fine pitch BGA packages with single-ended and differential links operating at up to 9GBPS.
High speed PCB design
This portfolio contains some high speed, high density PCBs that we have developed over time for different clients. These PCBs contained FPGAs, DSPs, RAMs with fine pitch BGA packages with single-ended and differential links operating at up to 9GBPS.
High speed PCB design
High speed communication platform utilizing Freescale PowerPC and Xilinx Virtex-2 FPGA. The platform was mainly designed as communication controller for remote sensing system. This platform provided RS-232, RS-422, SPI, I2C, NAND Flash, general purpose I/Os along with display, keypad, audio etc. interfaces. .
PowerPC + Virtex-2 based communication platform

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Principais Habilidades

C Programming Wireless Electronics Matlab and Mathematica Verilog / VHDL

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