Xor trabalhos
I need to make an encryption program that will read 5 parameters as follows: -in -out -key ...encryption program that will read 5 parameters as follows: -in -out -key 5 -mode enc -alg alg_name (caesar, vigenere, xor) The app must be able to create an output file based on the input file. Implemented Algorithms: 1) Caesar: -after 'z' there will be 'a'; -if a character is not in the alphabet it will be replaced with 'q'; -every uppercase char will be transformed to lowercase; Brute Force Attack for Caesar: the -key and -alg parameteres will pe replaced with the -hint parameter. After this param there will be a word, in case the uncrypted text contains that word, the decryption will be valid. 2)Vigenere crypting algotihm; 3)XOR binary
Alu de 5 bits sumador restador con multiplicador mul de 3 y 2 bits (Se pueden usar todas las compuertas or, and, xor etc.)
Your task is to simulate traffic lights with three colors (red, yellow, green) alternating at given intervals. You are allowed to use only following elements: multi-input AND/OR/XOR gates, D Flip-Flops, Clock, input/output pins, LED lights. Time delays for red, yellow and green colors should correspond to some three digits of your student ID, where zeros should be replaced by some other digit of your choice. Colors alternate in the following order: Red -> Yellow -> Green -> Yellow -> Red.
The task is computing the frequency of a certain given voltage waveform (fundamental freq. 50 Hz, sampled every 0.5 ms). The task should be implemented in Matlab simulink. However, I already did the project to the some point, I successfully set up the blocks and I got a certain results. Yet, it's needed to develop a transfer functions for each of the used blocks (XOR circuit, Filter, VCO - voltage control oscillator) in order to achieve the best results. Anyway, the structure I developed is not the best one, maybe there are some elements that are not needed in there. Also, I would need the proper explanation for all the procedure taken further.
Needed an Expert in Cryptography, python understanding is preferable. Given: -A Plain Text composed of 4 fields . -The encoded ciphering for these fields of 34 bytes. -There is a encipher Key of 32 bytes to encipher the Plain Text. -A presumable algorithm simply XOR and Rotate but not the real one.. Needed: The Enciphering KEY of 32 bit .. Contact me for more details and documentation...
I have a very simple Cadence schematic and layout I have designed of an XOR gate. For some reason the nest lists do not match in the LVS check. I cannot figure out this simple task because I am new to the process. The layout cannot change but corrections can be applied and the entire schematic can change to make the proper corrections to match the layout.
...who you did the question and with a screen shot from the answer from cedar and the deadline is on friday so i needed in the nearset day pleas Here is the questions: i) Implement a 4-bit full adder. 5% ii) Implement a 4-bit controlled inverter. 5% iii) Implement a 4-bit full addition / subtraction unit.5% iiii) Implement a 4-bit logical unit with multiplexor (AND, OR, XOR, !A)5% v) Use a single set of inputs for both the logical unit and the arithmetic unit5% vi) Implement an appropriate input, encode and decode circuit (function selector)15% to select the appropriate output from either the arithmetic or logic unit Additional tasks – not to be attempted unless parts i) to vii) have been completed vii) Scale the entire circui...
I am looking for a university student or anyone with some spare time to do some research on how to pull/fetch PUBIC and PRIVATE repos into a container at docker build stage (not run stage). Some ideas: OAuth refresh token SSH keys More details: I have a docker swarm service which contains a PHP project stored in a private repo on github xor gitlab xor bitbucket. The container's dockerfile will have everything required clone or pull the project and then deploy the project. Docker swarm needs to be able to always pull/clone the project because it may kickstart a container anytime. The solution therefore can't use an access token because they expire after 1 hour. It may require a OAuth refresh token and/or SSH key.
...minimal styling is in order. -- Hash identifier function must identify the hash and the hash with salt -- in case of the user adding the hash. The Script must identifies the following hash's at least: ADLER-32 CRC-32 CRC-32B CRC-16 CRC-16-CCITT DES(Unix) FCS-16 GHash-32-3 GHash-32-5 GOST R 34.11-94 Haval-160 Haval-192 110080 ,Haval-224 114080 ,Haval-256 Lineage II C4 Domain Cached Credentials XOR-32 MD5(Half) MD5(Middle) MySQL MD5(phpBB3) MD5(Unix) MD5(Wordpress) MD5(APR) Haval-128 MD2 MD4 MD5 MD5(HMAC(Wordpress)) NTLM RAdmin v2.x RipeMD-128 SNEFRU-128 Tiger-128 MySQL5 - SHA-1(SHA-1($pass)) MySQL 160bit - SHA-1(SHA-1($pass)) RipeMD-160 SHA-1 SHA-1(MaNGOS) Tiger-160 Tiger-192 md5($pass.$salt) - Joomla SHA-1(Django) SHA-224 RipeMD-256 SNEFRU-256 md5($pass.$salt) - Joomla SAM...
We require code for an STM32 which will take data and store it in an efficient manner to send in packets to a computer. This will be analog data samples, grouped together in packets, every few seconds. We are looking at something like XOR compression, storing the difference.
In this project you are required to design and implement a genetic algorithm (GA) which computes the results from the logical gates AND, OR, XOR and full adder. ---------- -) Deadline: 4-5 Days -) Language: C or Python, or any Programming Language of your choice -) file has a simple implementation of a G.A. (Genetic Algorithm) in C , which you can use it. -) You must deliver a Report and your code files.
i have 2 small projects must be done in these two days , you will find 2 attached files from my college materials , if you want more info you can message me anytime or we can contact by phone . 1st project : 9*9 sudoku solver by matlab 2nd project : xor gate by matlab you will find "and,or gate " on the attached slides , may it help you please every line and functions in the code must be explained :)
Sketch a transistor-level schematic of a CMOS 3-input XOR gate. 1- Size the transistors Use the smallest integer widths to achieve ratio of 1(i.e. equal rising and falling resistances) 2- Use Magic VLSI layout tool to Design your layout of the sized design then use irsim to simulate your design (all combinations of input A,B,C). The report should include the following. Design document Testing results Source code and layout
I need help with a machine learning question based on XOR logic gate. It requires some coding in python in Jupyter notebook only code where indicated "Implement me"
...of 8 blocks. After reading both key and plain data, the main process first writes key file and after 128-bit plain text blocks by dividing plain data to the next-child pipe. Then this process starts to read encrypted blocks from the last child process and writes them to encrypt.txt. All these three files will be in binary format. The second process applies XOR operation. After reading plain block from main process pipe and applying XOR between the same length plain and key blocks, this process writes the intermediate result to the next child pipe. The third process applies permutation. In this step, data of length 8 bytes is divided into two blocks as the first 4 and last 4 bytes, and the byte data having the same indices as the two blocks are replaced with each other. ...
Program should encrypt/decrypt given file using a simple XOR cipher with the given key file. So when the XOR cipher is applied to the now encrypted file, it should return the original file in the original format. Given/Inputs: two text files File 1: multiline text file: needs to be encrypted/decrypted with a simple XOR cipher using the key-file given. File 2: Key text file: will be a file of size ranging anywhere from 10 bytes to 10 Petabytes, containing random bytes. Output: A new text file containing the encrypted/decrypted data from File 1 above. Caveats / Catches / Rules: using pre-supplied libraries, packages, modules, etc. for the XOR encryption is not allowed. XOR is done character by character using their corresponding ASCII va...
...with the Erasure code technique the data are divided in to chunks and then those are placed in the MHT tree. So like the merge sort the each chunks are XOR'ed with one another, so that the crashed data can be obtained using the XOR operation. In the MHT tree, for each level the replica should be maintained. So that base level of MHT is crashed it will be recovered from replica, and from the baselevel if any one of the chunk crashed, using XOR it can be recovered from parent node and sibling node. So there'll be 3 method for recovering data as 2.XOR 3.Replica. The project would be developed only in java and my-sql. The user interface has need to developed, because the whole process is performed in Host system and hash value generate through t...
OpenVPN client with XoR Scrambler support cross (Windows, Android, MAC OS, Linux,(iPhone?)) platform application develop. Client application should contain: 1. Server list: sorted by country, server list (zip file) will be downloaded via specific link. 2. Choose a server type, like TCP, P2P, TOR. 3. XOR patched and support full features. 4. User authentication should be checked when user try to connect to the VPN server. 5. Sequence for cross platform: Windows, Android, MAC OS, Linux. (iPhone?) 6. Kill switch support. 7. Automatic login. 8. Automatic start application. 9. Update server list button and by schedule. 10. Etc. P.S. Please find in attachment some pictures from our old project.
can you create shellcode to run embedded xor encrypted exe in memory ? the shellcode can detect if it is running in 32bit or 64 bit process
I have an Arduino code that processes a 17 byte incoming HEX string and outputs to an LED display. Currently it acts on only 4 bytes of each string, ignoring bytes including the start byte and checksum however I wish to make the code more robust by using the start byte and checksum that exists in the HEX string. The checksum is a one byte XOR appended to the end of the HEX string.
...Load and Store instructions can only load and store words. There is no instruction to load or store a byte in memory. Register File Implement a Register file containing fifteen 32-bitregisters R1 to R15 with two read ports and one write port. R0 is hardwired to zero. Arithmetic and Logical Unit (ALU) Implement a 32-bit ALU to perform all the required operations: ADD, SUB, SLT, SLTU, OR, AND, XOR, NOR, SLL, SRL, SRA, ROR Addressing Modes PC-relative addressing mode is used for branch instructions. o For branching (BEQ, BNE), the branch target address is computed as follows: PC = PC + sign-extend (Imm12). Add the contents of PC to the sign-extended 12-bit Immediate. Direct addressing mode is used for jumps (J and JAL): PC = immediate24. o The JR (Jump Register) instr...
Implement a hash table with bit-xor functions. Other details will be given if interested.
the required functionality is retrieval of all similar images to a cue image, where the degree of similarity is user-set via a tolerance input (in [0,100], with 0=identical and 100=all stored images). This requires the use of a special data structure called NB+Tree. To use an NB+Tree, the bit stri...be mapped to a key by simply counting the number of 1s in the bit string. Similar bit strings (e.g., 10111000 and 10101000) will have similar keys (e.g., 4 and 5, respectively), but on the downside, some dissimilar bit strings will also have similar - even identical - keys (e.g., 1010101010 and 0101010101 both have key 5). As such, retrieved keys will have to be filtered first by using a bitwise XOR comparison of the cue and retrieved key, to ensure the percentage difference is within t...
...system. With this system, a PC application allows a user to awaken the UNO board by sending an 8-bit unsigned integer, denoted as THRESHOLD, to the FPGA through UNO. Once (and only after) the UNO board is awakened, the UNO board waits for 100 samples from the FPGA board. The FPGA board again waits for a push button action. After the button is pushed, it performs XOR operations on the 8 THRESHOLD bits. Depending on whether the XOR result is one or zero, it sends back the 100 8-bit count values of either an up counter or a down counter. Communication between UNO and FPGA should be done in a bit-serial fashion...
VPN cross platform application creation for Windows/MAC OS/Linux based on OpenVPN 2.4 version with XOR/Scrambler patched support.
a DE0-Nano FPGA board to a UNO board using two jumper wires for data transfer an...should do the 5th question 5. Modify the previous assignment so that, a bit string of 16 bits is sent from the UNO to the FPGA using a single data wire plus one or two control wires for synchronization (which could be either strobing or handshaking). When a pushbutton on the FPGA board is depressed and released, the FPGA sends a bit string of 16 bits to the UNO for display. Depending on the XOR result on the 16 bits, the bit string sent from the FPGA is either the same as the received bit string or the 1’s complement of the received bit string. The data transfer should be as fast as possible. The original bit string may be hard-coded inside the UNO code or input from a serial monit...
4. Connect a DE0-Nano FPGA board to a UNO boa...the serial monitor window. 5. Modify the previous assignment so that, a bit string of 16 bits is sent from the UNO to the FPGA using a single data wire plus one or two control wires for synchronization (which could be either strobing or handshaking). When a pushbutton on the FPGA board is depressed and released, the FPGA sends a bit string of 16 bits to the UNO for display. Depending on the XOR result on the 16 bits, the bit string sent from the FPGA is either the same as the received bit string or the 1’s complement of the received bit string. The data transfer should be as fast as possible. The original bit string may be hard-coded inside the UNO code or input from a serial monitor. i just want to complet...
Modify the previous assignment so that, a bit string of 16 bits is sent from the UNO to the FPGA using a single data wire plus one or two control wires for synchronization (which could be either strobing or handshaking). When a pushbutton on the FPGA board is depressed and released, the FPGA sends a bit string of 16 bits to the UNO for display. Depending on the XOR result on the 16 bits, the bit string sent from the FPGA is either the same as the received bit string or the 1’s complement of the received bit string. The data transfer should be as fast as possible. The original bit string may be hard-coded inside the UNO code or input from a serial monitor
4. Connect a DE0-Nano FPGA board to a UNO boa...the serial monitor window. 5. Modify the previous assignment so that, a bit string of 16 bits is sent from the UNO to the FPGA using a single data wire plus one or two control wires for synchronization (which could be either strobing or handshaking). When a pushbutton on the FPGA board is depressed and released, the FPGA sends a bit string of 16 bits to the UNO for display. Depending on the XOR result on the 16 bits, the bit string sent from the FPGA is either the same as the received bit string or the 1’s complement of the received bit string. The data transfer should be as fast as possible. The original bit string may be hard-coded inside the UNO code or input from a serial monitor. i just want to complet...
4. Connect a DE0-Nano FPGA board to a UNO bo...the serial monitor window. 5. Modify the previous assignment so that, a bit string of 16 bits is sent from the UNO to the FPGA using a single data wire plus one or two control wires for synchronization (which could be either strobing or handshaking). When a pushbutton on the FPGA board is depressed and released, the FPGA sends a bit string of 16 bits to the UNO for display. Depending on the XOR result on the 16 bits, the bit string sent from the FPGA is either the same as the received bit string or the 1’s complement of the received bit string. The data transfer should be as fast as possible. The original bit string may be hard-coded inside the UNO code or input from a serial monitor. i just want to complete 5th que...
4. Connect a DE0-Nano FPGA board to a UNO board using tw...serial monitor window. 5. Modify the previous assignment so that, a bit string of 16 bits is sent from the UNO to the FPGA using a single data wire plus one or two control wires for synchronization (which could be either strobing or handshaking). When a pushbutton on the FPGA board is depressed and released, the FPGA sends a bit string of 16 bits to the UNO for display. Depending on the XOR result on the 16 bits, the bit string sent from the FPGA is either the same as the received bit string or the 1’s complement of the received bit string. The data transfer should be as fast as possible. The original bit string may be hard-coded inside the UNO code or input from a serial monitor. i want to complete jus...
logic gates,,OR AND XOR,,,boolean algebra expressions,,,combinational logic circuits,,,pipelining and caching etc..
We have an elf file that contains an algorithm that xors several inputs. We no longer have the source code. We need the algorithm recreated in c, or cpp.
I need you to develop some software for me. I would like this software to be developed for Windows . Design alu(and or xor add subtract slt sltu sll sla srl ) Design datapah ( shifters counters memory mux) Design control unit
School Project A software that generates a malware file in word or excel form. The malware works this way, injection of malware into the macro of the word and excel file. The malware excel/word file should be able to send to the infected machine without alarming the antivirus solut...(e.g. pdf, doc*, ppt*, xls*, txt) List of softwares installed List of network drives on the machine Restrictions: Metasploit framework (msfvenom) cannot be used to generate the malware to be embedded into the files. You have to create from scratch. Methods and techniques to avoid or lower the detection rates of antivirus Obfuscation of source code (function calls) Encryption - e.g. XOR Parameter appending (refer to the Sophos link for some insight) Small codebase Other potential ...
I'm creating truth tables for no other reason than to satisfy my own curiosity. I 'd like several binary truth tables created for electronic and gate, nand gate, or gate, nor gate, xor gate. The tables will represent gates that have 2 inputs 4 inputs 8 inputs 16 inputs 32 inputs 64inputs and 128 inputs. The tables will resemble the following //00 if(0 == 0)("t zero bit is equal to zero bit") You may change the wording or if statements to anything that is more descriptive of what the if statement is testing but must include the comment representing the logic and accompanying if statement. The tables will include all binary truth table combinations for each gate and number of bit described above. 2^2 2^4 2^8 2^16 2^32 2^64. Feel free to ask any ...
Complete the following questions and show work. COMPUTER NUMBER SYSTEMS 1. Create a table that counts from 0 – 15 in decimal, hexadecimal and binary. Decimal Hexadecimal Binary 0 0 0 2. Fill in the following table. X Y X AND Y X OR Y X XOR Y T T T F F T F F 3. Convert the following numbers from decimal to binary. Please show work. 16 165 255 256 1243 4. Convert the following numbers from decimal to hexadecimal. Please show work. 66 560 1001 15 199 5. Convert the following numbers. Please show work. 133 (decimal) to hexadecimal 12AF (hexadecimal) to decimal to binary 1110111 (binary) to decimal to hexadecimal 11010101 (binary) to decimal 32CF (hexadecimal) to decimal t...
Deseo crear una funcion que pueda hacer uso de XOR para un archivo o string file, y el programa tambien puede reversarlo
...cores project I want a simple module that is able to do the following on a Xilinx ZedBoard: 1. Given 256 bit BITKEY, scramble the input with a hard coded IDKEY in the FPGA and provide a AESKEY 2. The same response needs to be piped to an AES256 module from OPEN CORES in order to encrypt/decrypt a stream of data INPUTS: 1. 256 BITKEY 2. selector BIT for encrypt decrypt (the output needs an XOR for decrypt) 3. stream of data as 256 bit 'chunks'. The architecture here should be trivial to support a driver easily. OUPUTS: 1. 256 AESKEY 2. stream of encrypted/decrypted data as 256 'chunks' DOCUMENTATION: This should be the bulk of the work; There needs to be diagrams and specifications for reproduction on another ZedBoard. This should include: 1....
creation of NAND, NOR, XOR, XNOR, INVERTER, AND, OR gate using memristors in cadence-virtuoso
using memristor I need basic logic Gates like AND,OR,XOR and If possible INVERTER. Using this Gates I need a design of 4bit ALU
Fixing my C++ XOR neural network.
I need Logic Gate Simulator done in C++. It should handle AND, OR, NAND, NOR, XOR and NOT gates. Project should be based on classes and lists, no graphical interface needed. It should handle circuits more advanced than most basic (i.e from description in another file). Main goal is to obtain correct value of last output value.
This project is a simple equation with an answer written in c/c++ write a function that can calculate x given y and i y = (x ⊕ 32757935 * i ⊕ ROR(x, 3) ⊕ ROL(x,7)) Where - ⊕ is the XOR operator for 32 bit values - ROR and ROL are functions for circular shifting bits ROR(IGHT), ROL(EFT) - * is regular multiplication i and y will be known but x will not be know i is usually in this case an increment but assume its unique for every value of x and y more information on ROL and ROR
Using Xilinx 1. Build arithmetic circuit that can add, subtract, negate, increment, and decrement 4-bit numbers 2. Build logic circuit that can AND, OR, XOR, and NOT 4-bit numbers 3. Using the circuit in (1) and (2), build 8-bit circuits 4. Combine two circuits together so that user can use any of the two circuits, making it a small ALU circuit. 5. Simulate the circuit using xilinx
1. Build arithmetic circuit that can add, subtract, negate, increment, and decrement 4-bit numbers 2. Build logic circuit that can AND, OR, XOR, and NOT 4-bit numbers 3. Using the circuit in (1) and (2), build 8-bit circuits 4. Combine two circuits together so that user can use any of the two circuits, making it a small ALU circuit. 5. Simulate the circuit using the tool available on the blackboard or any other tool you are comfortable with. Students should design the above circuits using logic gates as building blocks and simulate the system using the ISE Simulator Xilinx 8.2i software.
...repeated by 1024/8=128 times; opad:01011100 (5C in hexidecimal) repeated by 1024/8=128 times. We can describe the HMAC algorithm as follows: 1. Append zeros to the end of K to create a b-bit string (e.g., if K is of length 160 bits, and b = 1024 bits, then K will be appended with 864 bits of zeros to the end of K). 2. XOR (bitwise exclusive-or ) with ipad to produce b-bit block Si. 3. Append input message M to Si. 4. Apply hash to the stream generated in step 3. 5. XOR with opad to produce the b-bit block So. 6. Append the hash output from step 4 to So. 7. Apply hash to the stream generated in step 6 to produce the output of HMAC. After computing the HMAC with key K of an input message M, print it on the screen in hexadecimal format, also store the HMAC output in the...
...repeated by 1024/8=128 times; opad:01011100 (5C in hexidecimal) repeated by 1024/8=128 times. We can describe the HMAC algorithm as follows: 1. Append zeros to the end of K to create a b-bit string (e.g., if K is of length 160 bits, and b = 1024 bits, then K will be appended with 864 bits of zeros to the end of K). 2. XOR (bitwise exclusive-or ) with ipad to produce b-bit block Si. 3. Append input message M to Si. 4. Apply hash to the stream generated in step 3. 5. XOR with opad to produce the b-bit block So. 6. Append the hash output from step 4 to So. 7. Apply hash to the stream generated in step 6 to produce the output of HMAC. After computing the HMAC with key K of an input message M, print it on the screen in hexadecimal format, also store the HMAC o...
...plugin for OpenCPN More info about the API: :developer_manual:plugins The plugin needs to work as follows. When you click to bring up the Menu on the map. It will need to add custom entrie(s) that will be specified in a config/settings file. The commands should have some kind of basic encryption so only I can add commands such as xor NUM > base64 The config/settings file will contain something similar to: Menu Title,Menu to Show in,Wait for response,Command ----------------------------------------------------- "title 1",S,1,"command {lat} {lon} {zoom}" "title 2",S,0,"command {lat} {lon}" "title 3",A,0,"command {MMSI}" {lat} {lon} {zoom} > should get replaced by the current latitude, lon...
...one out of the 3 file shares does not prevent the recovery of the original file. You are suggested to follow a step-wise improvement approach indicated below. 1. XOR based 2-out-of-3 secret sharing Implement the XOR based 2 out of 3 secret sharing scheme where a secret is of 256 bits (or 32 bytes). Given a 256-bit secret, three 256-bit secret shares are generated. From any 2 of the 3 shares, the original 256-bit secret is recovered. (See slides for a description of the XOR based secret sharing scheme.) 2. XOR based 2-out-of-3 file sharing Using the above secret sharing method as a building block, implement the XOR based 2 out of 3 file sharing scheme where a file can be of arbitrary size. Given a file, three file shares are generated. From a...
