implement a Multiplier Accumulator Circuit Using VHDL

$30-250 USD

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há mais de 2 anos

$30-250 USD

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You are required to implement a Multiplier Accumulator Circuit (MAC). This circuit takes two sets of 10 inputs; each input is 8 bits long. The circuit multiplies the each two corresponding numbers in the set and adds the results to the following number and so on. After all the results for the entire set is calculated, the output register produces the output of the circuit and the operation is repeated for new sets

Verilog / VHDL

Electrical Engineering

Electronics

Microcontroller

FPGA

ID do Projeto: 31203831

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Ativo há 3 anos

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@NarendraNemo

Hi dear, I am master graduated in VLSI design and Embedded systems and also had 3 years of experience in developing algorithm especially mathematical functions, digital circuits and signal processing algorithm on zynq or fpga using verilog/VHDL and all these I can develop in matlab also. So can you please initiate chat for discussion.

$50 USD em 2 dias

4,4

(2 avaliações)

2,2

7 freelancers estão ofertando em média $93 USD for esse trabalho

@bipinmandal736

I am a fourth-year student from the Department of Electronics and Electrical Communication Engineering. This is the domain of my interest. I shall be able to do this in a few hours. I have more than 12 months of continuous experience of working with VHDL. I am in great touch. You can check if you want. I request you to please consider. Thank you.

$30 USD em 1 dia

5,0

(18 avaliações)

4,6

@moaazkh96

Hi, I am a senior digital design engineer, I have a broad knowledge of digital design in ASIC and FPGA using both VHDL and Verilog. I am using Vivado, ISE, and Quartise for FPGA, using DC, ICC, and prime-time for ASIC. I will provide you a professional report about your project with citation and scientific formatting. Please contact me to know more about your needs. Regards, moaaz.

$89 USD em 10 dias

4,9

(33 avaliações)

4,7

@senthilps3

Hi I am a researcher and assistant professor in electrical and computer engineering at university level. My previous projects were processor design and FSM based data path design in free lancer. You can check the portfolio in my profile for latest project completion. I assure that your MAC based FSM design would be completed on timely . Initiate the chat for discussing about your project

$50 USD em 7 dias